Context And Mission
BSC is looking for 5 talented and motivated professionals with expertise in ASIC design and IP integration for a European HPC accelerator. The design is based on RISC-V architecture. This is a project to build an FPGA-based emulator for an energy-efficient Exascale system.
Key Duties
Design, including writing specifications, develop and build complex digital designs focused on scalar processors, vector units, and/or other accelerators.
Design integration, logic synthesis and design optimization for area, timing and power.
Develop front-end methodologies and tool flows.
Collaborate closely with other design and verification engineers in active projects and perform hands-on design, writing RTL.
Participate in chip bring-up and testing.
Requirements
Education
Ph.D. in Electrical Engineering or Engineering degree or equivalent level of professional experience.
Essential Knowledge and Professional Experience
Microprocesor architecture for modern in-order and out-of-order processor core, based on RISC-V preferred.
Knowledge of high-speed low-power design techniques. Logic synthesis and timing closure, is a plus.
System MultiProcessors related topics such as coherency and consistency.
RTL Design (Functional/Structural, Partitioning, Simulation, Regression); Tools: Modelsim, VCS.
Proficiency in Verilog/VHDL, and end-to-end design methodologies is required.
3rd Party IP integration.
Experience in taking ASIC (gate array, library-based, and/or full custom) designs through to production is a plus.
Strong scripting/programming in csh/bash. Tcl, Python, and C/C++ is a plus.
Agile development and open source development, deployment, and support, including GitHub or equivalent.
Fluency in English is essential, Spanish is welcome.
Competences
Effective communication, multitasking, and working well on collaborative designs
Keeping abreast on technology trends.
Ability to think creatively.
Ability to work independently and make decisions.
Ability to take initiative, prioritize and work under set deadlines and pressure.
Conditions
The position will be located at BSC within the Computer Sciences Department
We offer a full-time contract, a good working environment, a highly stimulating environment with state-of-the-art infrastructure, flexible working hours, extensive training plan, tickets restaurant, private health insurance, fully support to the relocation procedures
Duration: Open-ended contract due to technical and scientific activities linked to the project and budget duration
Salary: we offer a competitive salary commensurate with the qualifications and experience of the candidate and according to the cost of living in Barcelona
Starting date: asap