Company
INRIA Research Center
Company Website
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Temporary
12 months (renewable for another 12) with a monthly salary of 2653 euros (before social charges on salary and monthly withholding taxes for income)
Applications have closed
Post-Doctoral Research Visit F/M Modeling IO interference/congestion to develop new scheduling algorithms for HPC platforms

While computing power of supercomputers keeps on increasing at an exponential rate, their capacity to manage data movement experiences some limits. It is expected that this imbalance will be one of the key limitation to the development of future HPC applications. We propose to rethink how I/O is managed in supercomputers. More specifically, the novelty of this project is to account for known HPC application behaviors (periodicity, limited number of concurrent applications) to define static strategies. We expect that those strategies can be turned into more efficient dynamic strategies than current strategies.
In this study, we plan to include a dynamicity provision to cope with any uncertain behavior of applications. We also plan to research how to model and include emerging technologies.

The goal of the work is to develop new algorithms and techniques to understand, model and deal with I/O congestion on an HPC platform.

We are interested in modeling IO congestion by studying the behavior of several interfering IO benchmark and varying parameters.

The precise work program will be rediscussed depending on the strengths and will of the applicant.

 

Project Presentation